Blueprint for fault-tolerant qubits

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Blueprint for fault-tolerant qubits
Proposed hardware implementation of the QEC code. The circuit consists of two Josephson junctions coupled by a gyrator, highlighted in red. Credit: M. Rymarz et al., Phys Rev X (2021), 10.1103/PhysRevX.11.011032 (CC BY 4.0)

Building a universal quantum computer is a challenging task because of the fragility of quantum bits, or qubits for short. To deal with this problem, various types of error correction have been developed. Conventional methods do this by active correction techniques. In contrast, researchers led by Prof. David DiVincenzo from Forschungszentrum Jülich and RWTH Aachen University, together with partners from the University of Basel and QuTech Delft, have now proposed a design for a circuit with passive error correction. Such a circuit would already be inherently fault protected and could significantly accelerate the construction of a quantum computer with a large number of qubits.


In order to encode quantum information in a reliable way, usually, several imperfect qubits are combined to form a so-called logical . Quantum correction codes, or QEC codes for short, thus make it possible to detect errors and subsequently correct them, so that the is preserved over a longer period of time.

In principle, the techniques work in a similar way to active noise cancelation in headphones: In a first step, any fault is detected. Then, a corrective operation is performed to remove the error and restore the information to its original pure form.

However, the application of such active error correction in a quantum is very complex and comes with an extensive use of hardware. Typically, complex error-correcting electronics are required for each qubit, making it difficult to build circuits with many qubits, as required to build a .

The proposed design for a superconducting circuit, on the other hand, has a kind of built-in error correction. The circuit is designed in such a way that it is already inherently protected against environmental noise while still controllable. The concept thus bypasses the need for active stabilization in a highly hardware-efficient manner, and would therefore be a promising candidate for a future large-scale quantum processor that has a large number of qubits.

“By implementing a gyrator—a two port device that couples current on one port to voltage on the other—in between two superconducting devices (so called Josephson junctions), we could waive the demand of active error detection and stabilization: when cooled down, the qubit is inherently protected against common types of noise,” said Martin Rymarz, a Ph.D. student in the group of David DiVincenzo and first author of the paper, published in Physical Review X.

“I hope that our work will inspire efforts in the lab; I recognize that this, like many of our proposals, may be a bit ahead of its time”, said David DiVincenzo, Founding Director of the JARA-Institute for Quantum Information at RWTH Aachen University and Director of the Institute of Theoretical Nanoelectronics (PGI-2) at Forschungszentrum Jülich. “Nevertheless, given the professional expertise available, we recognize the possibility to test our proposal in the lab in the foreseeable future”.

David DiVincenzo is considered a pioneer in the development of quantum computers. Among other things, his name is associated with the criteria that a quantum computer must fulfill, the so-called ‘DiVincenzo criteria.’


Error-protected quantum bits entangled for the first time


More information:
Martin Rymarz et al, Hardware-Encoding Grid States in a Nonreciprocal Superconducting Circuit, Physical Review X (2021). DOI: 10.1103/PhysRevX.11.011032

Citation:
Blueprint for fault-tolerant qubits (2021, February 18)
retrieved 20 February 2021
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